The speed of an integrated circuit (IC) in a given technology (e.g., 28 nm CMOS, complementary metal oxide semiconductor) is primarily affected by process variations, supply (core) voltage, and operating temperature (PVT). In general, circuit operating speeds (e.g., transistor switching time) decreases with supply voltage and increases with operating temperature. Worst case timing typically occurs with the setup time on one or more critical paths in a slowest process corner IC operating at high temperatures. In some cases, the hold time may be the limitation, which may occur with a fast process IC operating at low temperatures.
To guarantee operation in such worst case situations, the power supply voltage to the core can be adjusted to be high enough to ensure that the slowest process IC meets the timing requirements. However, while ensuring operation of the slow process IC, the high supply voltage can result in increased power consumption by a fast process IC, since faster ICs typically draw more current at a given frequency. In smaller geometries, particularly at 28 nm and lower, the leakage current becomes dominant, as it tends to be higher than the dynamic switching power. The leakage power exponentially increases with voltage, dramatically aggravating the problem.
Various approaches to mitigate such excessive power consumption use a technique referred to as dynamic voltage scaling (DVS) by which the voltage is dynamically adjusted during operation of the IC to counteract the temperature effects. Some solutions, for example, measure the frequency of a reference circuit (e.g., a free running ring oscillator) during operation as being representative of the process speed and operating temperature. The supply voltage may be adjusted to bring the frequency to a target value, which is typically a predetermined value based on simulations, characterizations, statistical data collected over process variation and temperature, and so on. A wide margin is typically built into the target value to guarantee operation of ICs at all the process corners and operating conditions. The wide margin tends to result in a high supply voltage setting, thus defeating the goal of voltage scaling.
Other solutions measure process speed during IC testing (e.g., by measuring a ring oscillator frequency at nominal voltage and nominal—room—temperature) and store those values in a set of fuses. During operation, the supply voltage can be dynamically scaled to drive the ring oscillator frequency to a target value determined as a function of process speed and operating temperature. Target values for ring oscillator frequency vs. process and temperature may be obtained by characterization of split lots representing process corners and measurements of large sample sizes over temperature.